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Overview

Agnos Framework is a portable CT/CL EMV stack certified on different OS, and platforms. Its functional behavior is stable across targeted devices, and is tested automatically before each TA. However, all the behaviors directly in link with the GPI porting (see GPI Level Integration page) shall be systematically addressed by the integrator beyond the unit testing phase. The section below gathers the challenges related to each TA test plan, and provides some guidance to design a specific integration strategy.

Note: this section documents the main concerns met during Agnos projects in relation with the GPI. The L3 (the software running on top of the card processing) presents other kind of challenges. But Kizis already integrates the tools' and TA's requirements.

CT/EMVCo Test Plan

Topic

Challenge

Comments

GPI

UN generation

To demonstrate numbers' randomness

HSM

APDU exchanges

To support APDU lengths at the limit

CAD

Online PIN

To demonstrate PIN decipherment using an ISO method

ISO methods are beyond EMV specifications' scope
Use https://www.emvlab.org/pinblock/ as reference to validate GPI integration

SPED

C-2/Mastercard Test Plan

Topic

Challenge

Comments

GPI

Performance

Optional PROCESSING message display may slowdown the system

SPED

Stop button (with a hardware keyboard)

CAD

Stop button (without a hardware keyboard)

CAD

RRP

To measure valid timings

CAD

RRP along with DEK-DET

To measure valid timings while logging

CAD

Torn

Platform

Beep

To measure an accurate performance time

SPED

LED

To measure an accurate performance time

SPED

DEK-DET

To validate post-conditions
(APDU logging vs DEK-DET logging)

CAD

C-3/Visa Test Plan

Topic

Challenge

Comments

GPI

Polling timeout

CAD

Polling interruption from cancel button

CAD

Polling interruption from card insertion

CAD

Transaction interruption from card insertion

CAD

6986 on GPO response

CAD

Interac Test Plan

Topic

Challenge

Comments

GPI

Performance

To perform an ODA public chain verification within the performance times measurement

2 RSA computations occur during the performance timing measurements

HSM

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