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The goal of the AgnosSP library is to address dual processor architectures where Agnos is only accessible through a serial interface, for exemple Agnos integrated in the Secure Element of a Device.
NOTE: This guide focuses on communication between the L2 Certification Application (Kizis) and the Agnos Services
Single Chip Device
Traditional Payment Terminals have a single Microprocessor Microcontrollers (or Microprocessors) on which both the L3 Payment Application Applications and Agnos are can both coexisting:
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In this type of architecture, the Payment Application (Level 3) may call Kizis makes direct calls to Agnos Services directly through the Agnos Rich API.
Dual Chip Device
New Payment Terminals (such as Android Devices) may require presence of a Secure Elements (or additional Microcontrollers) to prevent access of sensitive data from rogue Application (PCI compliance)
In such architectures, Kizis doesn’t have direct access to the Agnos Rich API, AgnosSP allows such access regardless of the type of serial interface (ex: USB, I2C, UART, SPI, RS232…):
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See the Agnos Serialization Protocol topic in the Developer's guide