Overview
The goal of the AgnosSP library is to address dual processor architectures where Agnos is only accessible through a serial interface, for exemple Agnos integrated in the Secure Element of a Device.
Single Chip Device
Traditional Payment Terminals have single Microcontrollers (or Microprocessors) on which the Level 3 Payment Application and Agnos can both coexisting:
In this type of architecture, the Level 3 Payment Application is able to call Agnos Services directly through the Agnos Rich API (Agnos Rich API)
Dual Chip Device
New Payment Terminals (such as Android Devices) may require presence of a Secure Elements (or additional Microcontrollers) to prevent access of sensitive data from rogue Application (PCI compliance)
In such architectures, the Level 3 Payment Application doesn’t have direct access to the Agnos Rich API.
AgnosSP will provide such access regardless of the type of serial interface (ex: USB, I2C, UART, SPI, RS232…):
